Method for limiting divot formation after shallow trench ...

Increasing the etch rate of the STI dielectric resulted in a tendency to cause STI divots and increased divot size. ... STI divot formation in accordance with the ...

2013年7月17日 — In the STI technique, a trench surrounding a semiconductor device such as a transistor is etched into a semiconductor substrate and then filled ...

A method for manufacturing shallow trench isolation (STI) structures in semiconductor device manufacturing including a method for minimizing divot formation ...

A method for forming shallow trench isolation (STI) features to reduce or avoid divot formation at STI trench corners including providing a shallow trench ...

2002年11月14日 — A shallow trench isolation to provide a method of limiting the formation of divots (STI) structure (305). The method includes the steps of ...

STI divot formation is eliminated or substantially reduced by employing a very thin nitride polish stop layer, e.g., no thicker than 400 Å. The very thin ...

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A method for eliminating the divots and seams present in a shallow trench isolation region of a semiconductor device is provided which improves the corner ...

由 Z Sui 著作 — ABSTRACT. In this paper, different etching methods and adjustments of the etching amount have been tried and the effect of increased depth of the STI divot ...